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Crucial role of interfacial thermal dissipation in the operational stability of organic field-effect transistors
hBN-assisted thermal dissipation for stable OFETs
https://orcid.org/0009-0007-2377-8674
Tie Kai Conceptualization Data curation Formal analysis Investigation Methodology Resources Validation Visualization Writing - original draft Writing - review & editing 1 2 †
Qi Jiannan Conceptualization Data curation Formal analysis Investigation Methodology Project administration Resources Software Supervision Validation Visualization Writing - original draft Writing - review & editing 1 2 †
Hu Yongxu Resources Supervision Writing - review & editing 1 2 †
Fu Yao Conceptualization Funding acquisition Supervision Validation Writing - original draft 1 2
Sun Shougang Funding acquisition Investigation Resources Validation Visualization Writing - review & editing 1 2
Wang Yanpeng Data curation Formal analysis Resources Validation 1 2
https://orcid.org/0000-0002-9579-4119
Huang Yinan Validation 1 2
https://orcid.org/0000-0002-1331-9796
Wang Zhongwu Methodology 1 2
Yuan Liqian Project administration Supervision Validation 1 2
https://orcid.org/0000-0001-8399-3957
Li Liqiang Conceptualization Data curation Formal analysis Funding acquisition Methodology Project administration Resources Supervision Validation Visualization Writing - original draft Writing - review & editing 1 2 *
https://orcid.org/0000-0003-3593-9897
Wei Dacheng Conceptualization Funding acquisition Methodology Project administration Supervision Validation 3 4 *
https://orcid.org/0000-0002-3055-8852
Chen Xiaosong Conceptualization Data curation Formal analysis Funding acquisition Investigation Methodology Project administration Resources Supervision Validation Visualization Writing - original draft Writing - review & editing 1 2 *
https://orcid.org/0000-0001-5686-2740
Hu Wenping Conceptualization Data curation Project administration Supervision Validation Writing - original draft Writing - review & editing 1 2
1 Key Laboratory of Organic Integrated Circuit, Ministry of Education and Tianjin Key Laboratory of Molecular Optoelectronic Sciences, Department of Chemistry, Institute of Molecular Aggregation Science, Tianjin University, Tianjin 300072, China.
2 Collaborative Innovation Center of Chemical Science and Engineering (Tianjin), Tianjin 300072, China.
3 State Key Laboratory of Molecular Engineering of Polymers, Fudan University, Shanghai 200433, China.
4 Department of Macromolecular Science, Fudan University, Shanghai 200433, China.
* Corresponding author. Email: xschen2019@tju.edu.cn (X.C.); lilq@tju.edu.cn (L.L.); weidc@fudan.edu.cn (D.W.)
† These authors contributed equally to this work.

06 9 2024
06 9 2024
10 36 eadn596418 12 2023
31 7 2024
Copyright © 2024 The Authors, some rights reserved; exclusive licensee American Association for the Advancement of Science. No claim to original U.S. Government Works. Distributed under a Creative Commons Attribution NonCommercial License 4.0 (CC BY-NC).
2024
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https://creativecommons.org/licenses/by-nc/4.0/ This is an open-access article distributed under the terms of the Creative Commons Attribution-NonCommercial license, which permits use, distribution, and reproduction in any medium, so long as the resultant use is not for commercial advantage and provided the original work is properly cited.

The operational stability becomes a key issue affecting the commercialization for organic field-effect transistors (OFETs). It is widely recognized to be closely related to the defects and traps at the interface between dielectric and organic semiconductors, but this understanding does not always effectively address operational instability, implying that the factors influencing the operational stability have not been fully understood. Here, we reveal that the self-heating effect is another crucial factor in operational stability. By using hexagonal boron nitride (hBN) to assist interfacial thermal dissipation, the dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene (DNTT) FETs exhibit high mobility of 14.18 cm2 V−1 s−1 and saturated power density up to 1.8 × 104 W cm−2. The OFET can operate at a power density of 1.06 × 104 W cm−2 for 30,000 s with negligible performance degradation, showing excellent operational stability under high power density. This work deepens the understanding on operational stability and develops an effective way for ultrahigh stable devices.

Self-heating is revealed to affect OFETs reliability, and hBN-assisted interfacial thermal dissipation is used for stable OFETs.

http://dx.doi.org/10.13039/501100001809 National Natural Science Foundation of China 52203236, 52225304, 52073210, 21573277 The National Key Research and Development Program 2022YFF1202700, 2018YFA0703200 http://dx.doi.org/10.13039/501100006606 Natural Science Foundation of Tianjin City 19JCJQJC62600, 19JCZDJC37400 The Program of Shanghai Academic Research Leaders 23XD1420200 http://dx.doi.org/10.13039/501100012226 Fundamental Research Funds for the Central Universities
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pmcINTRODUCTION

Organic field-effect transistors (OFETs) show great potential in flexible displays, the Internet of Things (IoT), and lightweight wearable electronics due to the advantages of mechanical flexibility, low cost, large-area processing, and biocompatibility (1–6). After decades of development, the mobility (μ) has been comparable to or even exceeded the hydrogenated amorphous silicon FETs (7–10). However, as approaching to commercial applications, the operational stability of OFETs becomes a key issue of concern (11–13). It is recognized that the primary mechanism behind poor operational stability arises from the defects and traps at the interface between dielectric and organic semiconductors (OSCs), where the carrier transport process occurs and Joule heat is generated (14, 15).

To date, many strategies including postprocessing thermal annealing (16, 17), the introduction of a passivation layer (18–20), and the use of molecular additives (11) have been developed to reduce or passivate the traps. However, the operational stability problem of OFETs under high power density is not resolved, which indicates another unknown factor that might influence operational stability. It has been reported that the Joule heat under high power density is sufficient to cause noticeable degradation of OSCs on the interface (21, 22). The nonnegligible Joule heat generated by organic devices aggravates the uneven strain caused by the mismatch of thermal expansion coefficients of consecutive device layers, resulting in more trapping states that localize charge carriers (23). Moreover, the thermal conductivity of OSCs is generally lower than 1 W/(mK) (24–26), which is much lower than that of traditional in OSCs (27), and the charge transport of OSCs is temperature sensitive. Therefore, the self-heating effect on the operational stability of OFETs cannot be ignored, especially for the integrated and aggressively downscaled (e.g., vertical structure or lateral structure with short channels) OFETs under high power density (28–30).

Hexagonal boron nitride (hBN) is a promising dielectric material in future electronic products due to its high dielectric constant, atomically smooth surface, wide bandgap, chemical inertness, and excellent mechanical strength and flexibility (31–34). The in-plane thermal conductivity and out-of-plane thermal conductivity are up to 2000 W m−1 K−1 and more than 600 W m−1 K−1, respectively (35–37), which is hundreds of times higher than the amorphous SiO2 now used for silicon-on-insulator devices (38, 39).

Here, we reveal that the self-heating effect is another crucial factor in the operational stability of OFETs and use hBN to assist the interfacial thermal dissipation of OFETs. The dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene (DNTT) FETs with hBN present an improved mobility of 14.18 cm2 V−1 s−1 (average mobility: 13.75 cm2 V−1 s−1), much higher than that with SiO2/Si (1.27 cm2 V−1 s−1). It is worth mentioning that the DNTT FET with hBN exhibits high stability with increased saturated power density up to 1.8 × 104 W cm−2 and can be operated at a power density of 1.06 × 104 W cm−2 for 30,000 s with negligible performance degradation, demonstrating excellent operational stability under high power density. Scanning thermal microscope (SThM) and infrared thermal imaging technology measurements demonstrate that the high operational stability under high power density benefits from the introduction of hBN, which could effectively improve the interfacial thermal dissipation capacity. These results indicate that the self-heating effect on the stable operation of organic transistors is not negligible, especially under high power density. This work deepens the understanding of operational stability, thereby providing guidance to construct OFETs with high operational stability and high performance under high power density.

RESULTS

Device preparation and high-performance DNTT FETs with hBN

The schematic diagram of the device structure is shown in Fig. 1A. hBN (fig. S1) was introduced on 300-nm-thick SiO2 and highly doped Si (hBN/SiO2/Si) to prepare DNTT (fig. S2A) FETs with good interfacial thermal dissipation. The detailed fabrication process is illustrated in figs. S3 and S4. As a comparison, DNTT FETs with SiO2/Si and octadecyltrichlorosilane (OTS)–modified SiO2/Si (OTS/SiO2/Si) were also fabricated. The chemical structure of OTS is shown in fig. S2B. The optical image (Fig. 1B) and the atomic force microscope (AFM) image of hBN (fig. S5) depict an ultrasmooth surface with a roughness of approximately 0.2 nm, which is lower than that of SiO2/Si and OTS/SiO2/Si. Besides, the thickness of hBN flakes from 35 DNTT FETs is approximately 15 nm (figs. S6 and S7), ensuring device uniformity. X-ray diffraction (XRD) confirms that the characteristic peak of hBN is at 26.79°, corresponding to the (002) crystal plane of hBN (fig. S8). Raman spectrum (Fig. 1C) collected from the sample has a sharp peak at 1365.8 cm−1, corresponding to the E2g phonon vibration of hBN. The full width at half maximum is 8.9 cm−1, indicating high uniformity and good crystalline quality (40, 41). In addition, the typical lateral size of hBN flakes and statistical results of the physical area of hBN flakes from 35 DNTT FETs are approximately 50 μm by 60 μm and 3000 μm2, respectively (figs. S9 and S10).

Fig. 1. Device structure and electrical performance of DNTT FETs with different substrates.

(A) Schematic illustration of DNTT FETs with hBN. (B) Optical image of few-layer hBN on SiO2. (C) Raman spectrum of hBN transferred onto SiO2. (D to F) Typical transfer curves of DNTT FETs with hBN/SiO2/Si, OTS/SiO2/Si, and SiO2/Si (VDS = −3 V, L = 8 μm, W = 12 μm). DNTT FETs with hBN exhibit excellent electrical performance compared to DNTT FETs with other substrates. The capacitance of the device in (D) is 9.60 nF cm−2. The lateral size and physical area of hBN flakes in (D) are approximately 36 μm by 106 μm and 3816 μm2, respectively. (G) Transfer curves of the DNTT FETs with hBN/SiO2/Si at different VDS from −3 V to −0.1 mV. L = 10 μm, W = 10 μm, Ci = 9.59 nF cm−2. The lateral size and physical area of hBN flakes are approximately 41 μm by 48 μm and 1968 μm2, respectively. (H) Linear region mobility of the DNTT FETs with different substrates. (I) The extracted mobility as a function of VGS for DNTT FETs with hBN in the linear region. L = 8 μm, W = 12 μm, Ci = 9.60 nF cm−2. The inset shows the optical microscope image of the corresponding devices. The lateral size and physical area of hBN flakes are approximately 25 μm by 58 μm and 1450 μm2, respectively. a.u., arbitrary units.

Few-layer DNTT crystalline films were controllably grown on hBN by the physical vapor transport (PVT) method in a tube furnace (note S1 and fig. S11). The optical image demonstrates that the DNTT crystalline film is successfully grown on the hBN/SiO2/Si (fig. S12). Notably, the growth region of DNTT crystalline films was all located on the hBN flakes (fig. S13). DNTT crystalline films grown on OTS/SiO2/Si and SiO2/Si substrates also have uniform thickness and high quality, as seen in fig. S14. The DNTT FETs were prepared by transferring gold electrodes (fig. S15).

To fully unveil the potential of DNTT FETs with hBN as dielectric layers, we investigated the electrical properties of the devices. All the devices were measured in nitrogen (N2) ambient with the on/off current ratios above 106. The transfer curve (Fig. 1D) shows a typical p-type characteristic with an excellent field-effect mobility in the linear regime of 14.18 cm2 V−1 s−1 and an on/off ratio up to 1 × 108 for DNTT FETs with hBN/SiO2/Si substrate, when the gate-source voltage (VGS) sweeps from 30 to −30 V. The optical image of the corresponding device in Fig. 1D is shown in fig. S16. The calculation of the FET mobility in the linear regime is illustrated in note S2 and fig. S17. On the contrary, the electrical performance of DNTT FETs with OTS/SiO2/Si and SiO2/Si substrates is poor with mobility of only 4.82 and 0.97 cm2 V−1 s−1, respectively (Fig. 1, E and F). The output curves (fig. S18) prove that the transferred gold electrodes make good contact with the DNTT crystals.

Notably, the device with hBN maintains the current on/off ratio above 103 even at a small drain-source voltage (VDS) of −0.1 mV (Fig. 1G). The average mobility of 35 DNTT FETs with hBN/SiO2/Si is 13.75 cm2 V−1 s−1 (Fig. 1H), which is much higher than that of DNTT FETs with OTS/SiO2/Si (4.63 cm2 V−1 s−1) and SiO2/Si (1.27 cm2 V−1 s−1). The extracted mobility as a function of VGS shows a clear plateau for a broad VGS range (Fig. 1I), which indicates the accurate evaluation of mobility (42, 43). To avoid the difference in sample quality, we grew DNTT crystals on SiO2/Si and then transferred to hBN and demonstrated the improved mobility of DNTT FETs with hBN/SiO2/Si mainly originates from the hBN layer rather than the sample quality (figs. S19 and S20).

Operational stability of DNTT FETs under high power density

The commonly used method to evaluate the operational stability of device is to apply a constant-voltage-bias stress test. The operational stability of devices can be described by drain-source current-time (IDS-time) curves and the transfer curves under different bias time (14, 44). To exclude the influence of water and oxygen in the air, all operational stability tests were performed in N2 ambient (11, 45). The electrical parameter statistics for all types of devices used for tests on operational stability are summarized in table S1. The DNTT FETs with hBN/SiO2/Si exhibit negligible change in transfer curves, while the electrical performance of the DNTT FETs with OTS/SiO2/Si and SiO2/Si decreases obviously after scanning 300 cycles (fig. S21). Furthermore, the temporal evolution of the normalized IDS of DNTT FETs with hBN/SiO2/Si and OTS/SiO2/Si was measured under different power densities (Fig. 2A). Notably, the devices with hBN show excellent operational stability under both high and low power densities (VDS = −30 and −1 V, respectively). In contrast, the electrical performance of the devices with OTS/SiO2/Si maintained well under low power density while decreased by more than 40% after operating for 30,000 s under high power density, indicating that other possible factors may affect operational stability under high power density apart from water, oxygen, and interface traps. In addition, the on-state current, mobility, and threshold voltage (VTH) of the device with hBN also have almost no obvious attenuation or drift for 30,000 s of bias stress test under both low and high power densities (Fig. 2B and fig. S22). Whereas the devices with OTS/SiO2/Si and SiO2/Si have an attenuation or decline, especially for devices with SiO2/Si, with a negative VTH shift even to 5.6 V and a decreased mobility over 30% after a long-time bias stress test of 30,000 s under high power density (Fig. 2C and fig. S23).

Fig. 2. Operational stability under high power density.

(A) Temporal evolution of the normalized drain current of DNTT FETs under different power density with hBN/SiO2/Si and OTS/SiO2/Si (N2 ambient; interval time: 200 ms; high power density: VGS = −30 V, VDS = −30 V; low power density: VGS = −30 V, VDS = −1 V). (B) Transfer curves of DNTT FETs with hBN/SiO2/Si under high power density as a function of stress time (L = 10 μm, W = 12 μm). The voltage sweep rate is 1 V s−1. The lateral size and physical area of hBN flakes are approximately 44 μm by 54 μm and 2376 μm2, respectively. (C) Statistical diagram of threshold voltage drift (ΔVTH) over time under high power density. (D) IDS-VDS curves of the current breakdown of DNTT FETs with different substrates. The inset shows the optical images of a DNTT FET with hBN/SiO2/Si before and after the current breakdown. Water and oxygen are less than 0.1 parts per million, and pressure is set to 1.0145 bar in the glove box. The voltage sweep rate is 0.5 V s−1. The lateral size and physical area of hBN flakes are approximately 48 μm by 65 μm and 3120 μm2, respectively. (E) Saturated power density of DNTT FETs with different substrates. (F) Comparison of power density versus stress time for previously reported devices. The values in Fig. 2F are the ratio of the current value after the bias test to the initial current value in the IDS-VDS bias test. N.A. represents not available. Every bias-stress condition from the literatures is summarized in table S2. Scale bar, 10 μm.

The saturated power density (P) of DNTT FETs with different substrates was measured when current breakdown took place. The calculation of saturated power density is illustrated in note S3. The devices with hBN can withstand higher VDS and on-state currents at the same VGS (Fig. 2D). The corresponding saturated power density (Fig. 2E) reaches up to 1.8 × 104 W cm−2 with hBN/SiO2/Si, much higher than that with OTS/SiO2/Si (5.66 × 103 W cm−2) and SiO2/Si (3.04 × 103 W cm−2), indicating that the hBN improves the device stability with higher saturated power density. Figure 2F summarizes the power density versus stress time of previously reported devices in the literatures. The saturation power density of our device increases by two orders of magnitude compared to that of reported lateral transistors and is expected to be comparable to that of vertical transistors.

Mechanism of the operational stability under high power density

The observed superior operational stability of DNTT FETs with hBN under high power density requires further theoretical understanding. One possibility is that the operational stability in OFETs is mainly affected by the charge traps which primarily come from the OSC, the semiconductor/dielectric interface, and the metal/semiconductor contact area (46), as shown in fig. S24. To shed light on the mechanism, we designed comparative measurements to rule out possible influences. Highly ordered crystals with low trap density could be obtained by PVT (34, 47). Besides, the transferred gold electrode avoids high-density traps caused by thermal damage. Therefore, a high-quality metal/semiconductor contact interface is realized (10). DNTT FETs with different dielectric layers are ideal models for exploring the influence of semiconductor/dielectric interface on the operational stability of OFETs.

To explore the key factors affecting the operational stability of OFETs under different power densities, bias stress tests were conducted under high and low power densities, respectively. We performed the measurements in N2 ambient to minimize the possible trace oxygen and water effects (oxidization and physical absorption) (48). The operational stability of the device was evaluated by the bias stress tests under low power density (VGS = −30 V, VDS = −4 V). The performance of DNTT FETs with hBN/SiO2/Si and OTS/SiO2/Si shows a negligible decrease after 30,000 s, showing good operational stability (figs. S25 and S26). In contrast, there is a notable decrease in the performance of DNTT FETs with SiO2/Si, demonstrating that the passivation of interface traps on the surface of SiO2 could efficiently improve operational stability under low power density.

However, the operational stability of DNTT FETs with OTS/SiO2/Si measured under high power density is poor (Fig. 2A), demonstrating that the deterioration of operational stability is not solely caused by interface defects. Because of the temperature-dependent charge transport mechanism of OFETs, the self-heating effect caused by high current under high power density could be the reason for decreasing the operational stability of the DNTT FETs with OTS/SiO2/Si (Fig. 3A). Under high power density, the Joule heat generated at the semiconductor/dielectric interface results in non-ideal behaviors originated by changes of trap density and the temperature dependence of mobility (30), thus affecting the electrical performance and the operational stability in OFETs. The experimental result shown in Fig. 3B also demonstrates that the electrical performance of device is affected by temperature. Therefore, effective thermal dissipation is indispensable to suppress the instability caused by the internal temperature rise of the device. To further prove this point, we tested the operational stability of the DNTT FET with OTS/SiO2/Si under the same high power density at both low temperature and room temperature. The corresponding transfer curves are depicted in fig. S28. The Joule heat generated during device operation can be effectively dissipated at low enough temperature. We found that the device with OTS/SiO2/Si still has good operational stability at low temperatures even under high power density (Fig. 3C), indicating that the operational stability of device can be achieved by improving thermal dissipation.

Fig. 3. Mechanism of Joule heat on operational stability.

(A) Schematic illustration of the factors on operational stability under high power density. Water, oxygen, and interface defects have been recognized in previous literatures, while Joule heat is usually ignored. (B) Variation in the mobility of DNTT FET with OTS/SiO2/Si over temperature during in situ heating. The mobility and on/off ratio were extracted from fig. S27. (C) Temporal evolution of the normalized drain current of a DNTT FET with OTS/SiO2/Si under the same high power density at different temperatures.

To investigate the effect of heat conduction through the hBN on device thermal dissipation in the presence of local hot spots due to defects, we did postgrowth transferred DNTT experiments. A small quantity of defects and interface traps will inevitably be introduced during the transfer process. With the same transferred crystal quality, the operational stability of devices with hBN/SiO2/Si is better than that with OTS/SiO2/Si under high power density, illustrating that the heat conduction through the hBN could indeed help to spread the heat and thus reduce the influence of the hot spots in the channel on the operational stability of the devices (fig. S29).

The results above illustrate that the self-heating effect is a key factor affecting the operational stability of OFETs under high power density. Besides, the improved operational stability of DNTT FETs with hBN/SiO2/Si benefits from better interfacial thermal dissipation induced by hBN.

Improved interfacial thermal dissipation of DNTT FETs with hBN

Last, to further verify the relationship between operational stability and device thermal dissipation, we evaluated and characterized the thermal dissipation effect of the device with the introduction of hBN. Consistent with the conditions used in the device operational stability tests under high power density, we used infrared thermal imaging technology to detect the temperature distribution of device (for details, see note S4 and fig. S30) (49, 50). As shown in the cross-sectional profiles of temperature changes (ΔT) of fig. S31, the device with hBN has a minor temperature rise compared to the device with OTS/SiO2/Si when applying the same power (Fig. 4, A and B), indicating that the Joule heat during the operation of the device can be effectively dissipated by the introduction of hBN (note S5 and fig. S32). Notably, because of the poor thermal conductivity of OSC layers, the detected surface temperature is lower but related to the actual internal temperature of OFETs. Moreover, the width-normalized current density for stable operation of DNTT FETs with hBN reaches 14.19 μA/μm, which is enough to cause performance degradation without effective thermal dissipation (for details, see note S6).

Fig. 4. Measurements of the interfacial thermal dissipation.

(A and B) Infrared thermal imaging of DNTT FETs with hBN/SiO2/Si and OTS/SiO2/Si, respectively. The sectional profiles of dashed line (ΔT) are shown in fig. S31. (C) The schematic of the SThM measurement. (D to F) SThM thermal images of DNTT crystals on hBN/SiO2/Si, OTS/SiO2/Si, and SiO2/Si, respectively. (G) The cross-sectional profiles of temperature changes (ΔT) across the hBN/OTS/SiO2 surface or DNTT edges, corresponding to the dashed lines in (D) to (F). The normalized thickness is carried out to calculate ΔT of the samples. (H) The variation of ΔT across the DNTT edge on different substrates. Scale bars, 20 μm (A) and 30 μm (B).

SThM measurements are conducted to characterize the heat distribution and temperature changes of the OSC layer on different substrates more quantitatively (Fig. 4C). SThM is a powerful tool for imaging submicrometer heat transfer at the surface and subsurface levels by scanning the surface of sample with a sharp temperature-sensing tip (for details, see note S7 and fig. S33) (51, 52). This is similar to microzone heating. When the tip scans on the sample surface by an active and contact mode (fig. S34), i.e., a steady electrical current is applied to the tip and no voltage is applied to the device, two-dimensional (2D) mapping thermal images of DNTT on hBN/SiO2/Si, OTS/SiO2/Si, and SiO2/Si (Fig. 4, D to F) are obtained by monitoring the temperature changes (ΔT) of the tip. The corresponding AFM images are obtained for thickness normalization (fig. S35). No obvious ΔT change is observed in DNTT on hBN/SiO2/Si, owing to efficient thermal dissipation between the tip and the substrate across the hBN. In contrast, the probed temperature changes of DNTT on OTS/SiO2/Si and SiO2/Si are tens of milli-Kelvin higher than that on hBN/SiO2/Si under the same conditions (Fig. 4G). However, the actual temperature difference is much larger due to the parasitic heat transfer by air between tips and samples (for details, see note S8). Multiple sets of data were collected for each set of samples to avoid chance in the experimental data (figs. S36 and S37). Although the sample DNTT on hBN/SiO2/Si has more interfaces compared with the DNTT on SiO2/Si, the former has lower ΔT change (Fig. 4H), indicating that the hBN layer accelerates the thermal dissipation from tip to substrate across the sample/dielectric interface (note S8), which is of great significance in device thermal management. The improved thermal dissipation of devices brings in turn high operational stability under high power density.

DISCUSSION

We reveal that the self-heating effect is another crucial factor in the operational stability of OFETs other than traps under high power density. Through hBN-assisted interfacial thermal dissipation strategy, we have constructed high operational stability and high-performance DNTT FETs. The saturated power density of the DNTT FET increases by several folds up to 1.8 × 104 W cm−2. DNTT FETs with hBN can operate at a power density of 1.06 × 104 W cm−2 for 30,000 s with negligible performance degradation, indicating the excellent operational stability of devices with improved interfacial thermal dissipation. Notably, although the thermal power per unit area can be diminished by adopting higher capacitance dielectrics or optimizing the operating voltages, the self-heating effect inevitably occurs in aggressively downscaled and integrated devices. More efficient thermal dissipation strategies should be devised to enable continuous operation of devices. This work provides a practical guideline for constructing ultrahigh stability devices especially under high power density, paving pioneering avenues to enhance device stability by improving interfacial thermal dissipation.

MATERIALS AND METHODS

Materials and instruments

DNTT was purchased from Sigma-Aldrich. The electrical characterizations of the OFETs were carried out with Agilent B1500A with the assistance of a probe station system in dark conditions. The hBN and DNTT samples were measured by optical microscope (Olympus), AFM (Multimode 8, Bruker, tapping mode), and Raman spectra (HORIBA XploRA, 532-nm laser). XRD was measured in reflection mode at 45 kV and 200 mA with Cu Kα radiation by using a RIGAKU SMARTLAB 9 KW diffractometer at room temperature. The temporal evolution of the normalized drain current at different temperatures was measured by LakeShore (TTPX probe station). The temperature distribution images were measured by Sentris Thermal Emission Microscope (EMMI) system. The thermal images were measured by using an SThM probe (VITA-DM) mounted in the tip cantilever of Bruker Dimension Edge AFM (note S7). The optical microscopy images of organic crystals and devices were measured by VK-X1050 3D laser confocal microscopy.

Device fabrication and characterization

The staggered DNTT FETs were fabricated on silicon substrates. The substrates consist of a highly doped Si wafer (gate electrode) and a 300-nm thermally oxidized SiO2 layer (dielectric layers). The hBN on SiO2/Si was prepared by mechanical exfoliation using scotch tape and polydimethylsiloxane. The contrast Si wafer samples were modified with OTS in a vacuum oven for 30 min at 120°C. DNTT crystalline films were epitaxially grown on mechanically exfoliated hBN by the PVT method in a tube furnace, and gold electrodes (20 nm) which were thermally deposited to the substrate in a vacuum at a rate of 0.5 Å s−1 ahead of schedule were transferred via probe with Agilent B1500A. The saturated power density was extracted from the following equationP=IDS*VDS∕L*W(1)

Operational stability characterization

Operational stability measurements in N2 ambient were performed in the dark and at room temperature. The content of water and oxygen is both less than 0.1 parts per million, and the pressure is set to 1.0145 bar in the glove box. The electrical characterizations of the DNTT FETs were carried out with Agilent B1500A with the assistance of a probe station system in dark conditions. The set voltage step is 0.1 V. The voltage sweep rate is 1 V s−1. The evaluation method is to apply a constant bias voltage to draw the current voltage curve and the transfer curve under different bias time to evaluate the operational stability of the device.

Acknowledgments

We sincerely appreciate the technological support about Sentris thermal emission microscope from J. Wang in Suzhou Gezofane Technology Co. Ltd.

Funding: This work was supported by National Natural Science Foundation of China (52225304, 52203236, 52073210, and 21573277), The National Key Research and Development Program (2022YFF1202700 and 2018YFA0703200), Natural Science Foundation of Tianjin City (19JCJQJC62600 and 19JCZDJC37400), The Fundamental Research Funds for the Central Universities, and The Program of Shanghai Academic Research Leaders (23XD1420200).

Author contributions: X.C., L.L., and D.W. conceived the work. X.C. and K.T. designed the research. K.T., J.Q., and Y.H. performed the experiments. Y.F., S.S., and Y.W. assisted in the experiments. Y.H., Y.H., Z.W., and L.Y. made valuable suggestions on this work. K.T., J.Q., X.C., L.L., D.W., and W.H. analyzed data and wrote the manuscript. X.C., L.L., D.W., and W.H. supervised this work. All authors reviewed and commented on the manuscript.

Competing interests: The authors declare that they have no competing interests.

Data and materials availability: All data needed to evaluate the conclusions in the paper are present in the paper and/or the Supplementary Materials.

Supplementary Materials

This PDF file includes:

Notes S1 to S8

Figs. S1 to S37

Tables S1 and S2

References
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